HORIZON-JU-CHIPS-2025-IA-two-stage-FT1: RISC-V Automotive Hardware Platform

04 March 2025|
Expected Outcome:

The overall ambition of this call is to develop in-vehicle demonstrators capable of PetaOPS computing taped-out on leading-edge processes. Proposals are expected to significantly bolster the development of a high-performance automotive RISC-V reference hardware platform, encompassing the following crucial components:

  • High-Performance RISC-V Automotive Application Processors: Launch of high-performance, RISC-V application processors designed for automotive applications. These processors will include advanced computer architecture techniques, multi-core configurations and support for high-bandwidth memory interfaces, catering to the complex computing demands of autonomous driving systems.
  • AI and ML Automotive Accelerators: Development of AI and ML accelerators with specialised ISA extensions for efficient data-intensive computations. These accelerators shall be optimised for automotive applications, supporting advanced AI models with a focus on energy efficiency and real-time processing capabilities.
  • System Integration and Interfacing: Establishment of a coherent system architecture integrating RISC-V cores, AI accelerators, memory and system peripherals. This includes the use of 2.5D/3D integration, the development of high-bandwidth interconnects with Quality of Service (QoS) and shared cache memories to support the high memory bandwidth required by advanced automotive applications. System 2.5/3D integration will be developed in this programme's call on heterogeneous integration for automotive.
  • Software Tools and Libraries: Development of a comprehensive tool-chain to support the developed RISC-V
  • ...
    Loading plans...